1. Field of the Invention
The present invention relates to a switching circuit, and more particularly, to a radio frequency (RF) switching circuit used in transmit-receive switching of wireless communication devices such as multi-band/multi-mode portable terminals used in a sub-microwave band or a microwave band.
2. Description of the Related Art
Research or development is actively ongoing on products such as multi-band/multi-mode mobile terminals. Particularly, global system for mobile communication (GSM) 4band mobile terminals are being actively developed. A new universal mobile telecommunications system (UMTS) mode is also added to realize better multi-band performance. Also, a switching circuit employing a small, high-performance single-pole/multi-throw (SPMT) switch capable of transmit-receive switching is demanded, as well as the multi-band performance of using transmission schemes of different frequency bands. The SPMT switching circuit is strongly required to reduce harmonic distortion and insertion loss.
FIGS. 2A and 2B are diagrams of a related art switching circuit, illustrating switching of a transmission part. FIG. 2A is a basic conceptual diagram, and FIG. 2B is an equivalent circuit diagram. A switching circuit in FIGS. 2A and 2B is an SP5T type switching circuit. In general, an antenna is connected to a common port, and switching is made such that one of port1 to port5 is selectively connected to the common port. In general, a high-power signal is supplied to the port1 and the port2, and a low-power signal is supplied to the port3 to the port5. As shown in FIG. 2A, input (I) terminals 1 to 5 of the port1 to the port5 are connected with power amplifiers 1 to 5, respectively. Switches for connecting any one port to the common port connected with the antenna include switches SW1 to SW5, and complementary switches SW1 to SW5.
An example of FIG. 2B illustrates a state in which the port1 to which a high-power signal is connected is connected to the common port. In the following description, the common port is referred to as a common output port, the port3 to the port5 are referred to as first input ports, and the port1 and the port2 are referred to as second input ports. Here, if the port1 which is one of the second input ports is connected to the common output port, a transmission signal is input to the port1 through the amplifier 1 from the I terminal 1, and this signal is output from the common output terminal. At this time, an output signal from the antenna contains harmonics because distortion components caused at the switch SW1 in an ON state and distortion components caused at the switches SW2 to SW5 in an OFF state are also output to the antenna. In general, the switches SW1 to SW5 and the switches SW1 to SW5 each include a semiconductor circuit, i.e., a field effect transistor (FET). In general, when the switches including the FETs are turned ON or OFF, signal distortion occurs, generating harmonics.
In the example of FIGS. 2A and 2B, there are four switches being in an OFF state and connected with the antenna via the common output port. As ports increase in number, the harmonic distortion increases.
FIG. 3 is a graph showing relation between the number of branches in an OFF state and signal degradation caused by the harmonics. As can be seen from FIG. 3, the signal degradation resulting from the harmonics increases with an increase in the number of branches in an OFF state. Japanese Patent Laid-Open Publication Nos. 2003-318717 and 2006-303775 disclose related art techniques for reducing insertion loss and harmonic distortion of an RF switching circuit.
The invention disclosed in Japanese Patent Laid-Open Publication No. 2003-318717 removes a specific frequency component by using a series resonant circuit and a transistor connected to the series resonant circuit, thereby compensating for resonance caused in an OFF state of the transistor.
Also, the invention disclosed in Japanese Patent Laid-Open Publication No. 2006-303775 changes a phase of a voltage applied to capacitance between a gate and a source of an FET constituting a switch and capacitance between a gate and a drain, thereby reducing the harmonic-distortion rate.
However, the inventions fail to sufficiently reduce the harmonic distortion or insertion loss with respect to an increase in the number of ports.